This invention relates to alignment marks on a semiconductor wafer which can provide good visibility, and a method of manufacturing the alignment marks.
In IC wafer processes, a photolithographic technique is very important to manufacture semiconductor integrated circuit devices, and includes the steps of placing a photomask over a semiconductor wafer, and aligning the alignment mark on the photomask with a corresponding alignment mark on the semiconductor wafer. Prior art positive type alignment marks for a semiconductor wafer are shown in FIGS. 1, 2 and 3. In these figures, reference numeral 11 designates a silicon substrate, and 11a designates chip regions divided by grid line regions 11b. Alignment marks 12, for example, are formed of polycrystalline silicon having a thickness of 1000-5000 .ANG. and are placed on the grid line regions 11b on the silicon substrate 11. Since the alignment marks 12 are subjected several times to a temperature of 600.degree.-1300.degree. C., oxide films having rough surfaces with a roughness of 300-600 .ANG. are necessarily formed on the alignment marks 12.
As shown in FIG. 4, to form phospho-silicate glass (PSG) film 14 having a thickness of 600-1000 .ANG. on the substrate 11, a photo resist film 15 having a thickness of 5000-20000 .ANG. is applied on the PSG film 14.
In automated alignment and exposure apparatus, the alignment is carried out by detecting light reflected from the surface of a semiconductor wafer, and then by placing the edge on an alignment mark 12 in coincidence with the end of a corresponding alignment mark on a photomask (not shown). Then, IC patterns on the photomask are copied on the surface of the photo resist film 15 by exposing the surface of the resist film 15 to ultraviolet light. However, since the surface of the photo resist film 15 on the edge of the alignment mark 12 is sloped, ring-shaped interference patterns 23 are observed in the scope of a microscope or an edge detector of the automated apparatus. (See FIG. 5) This interference pattern makes it difficult for a viewer to exactly align the alignment mark on a semiconductor wafer with the corresponding alignment mark on a photomask. Particularly, an automated alignment and exposure apparatus takes a long time to detect and align the edge of an alignment mark on a semiconductor wafer, so that it is difficult to carry out photolithographic processes without detection error, causing degradation of yields of IC devices having extremely fine structures. Furthermore, such an automated alignment and exposure apparatus has degraded the workability and efficiency of photolithographic process.